SK hynix looks beyond HBM to tackle AI memory bottlenecks

SK hynix is expanding its AI memory strategy beyond high-bandwidth memory, developing new technologies to address growing data bottlenecks as artificial intelligence shifts toward more complex inference workloads.

Ahn Hyun, president and chief development officer of SK hynix, outlined the company's next-generation memory road map during a keynote speech at SEDEX 2026, a semiconductor exhibition in Seoul, Wednesday.

Ahn said rapid growth in AI inference is creating new challenges for memory systems, as increasingly complex tasks, longer context windows and rising request volumes drive demand for faster data processing and greater storage capacity.

He projected that AI infrastructure performance requirements could grow roughly 19-fold by 2030 compared with 2026.

The challenge, he explained, is shifting from the traditional gap between processors and memory to bottlenecks caused by moving data across different memory layers, from HBM and conventional DRAM to solid-state drives.

To address this, SK hynix plans to optimize the entire memory hierarchy rather than focus solely on improving individual chips.

Alongside continued development of HBM, including customized versions tailored to customers' AI architectures, the company is advancing two emerging technologies: 3D stacked DRAM and high-bandwidth flash.

The 3D stacked DRAM technology places memory directly above processors such as graphics and neural processing units, shortening the distance data must travel to improve processing speeds and reduce power consumption.

HBF, meanwhile, applies advanced stacking and high-speed data transfer technologies developed for HBM to NAND flash memory.

SK hynix aims for HBF to deliver roughly 10 times the capacity of comparable-generation HBM at about half its bandwidth, potentially offering a more cost-effective way to handle the massive datasets required for AI inference.

The company sees particular potential in workloads that repeatedly read large volumes of data while requiring relatively fewer write operations.

SK hynix also plans to advance Compute Express Link and next-generation storage technologies to improve data movement and efficiency across AI systems.

Ahn emphasized the importance of establishing industry standards for HBF and strengthening cooperation with global technology partners to build a broader memory ecosystem.

At SEDEX 2026, SK hynix showcased its AI memory portfolio, including high-capacity server DRAM, enterprise solid-state drives and next-generation PC and mobile memory products.

The exhibition also featured an Nvidia Vera Rubin superchip and an HBM wafer signed by Nvidia CEO Jensen Huang, highlighting the companies' partnership.

SK hynix said its long-term goal is to combine advances in HBM with emerging memory technologies to improve overall AI infrastructure performance and energy efficiency.